The preferred embodiments relate to electronic power driven systems, such as those driven with power field effect transistors (FETs).
Certain electronically-driven power devices have high transient demands, such as at cold start-up, which tend toward requiring high current flow to meet the device (or customer) demands. For example, in automotive module applications, such as energizing an incandescent bulb coil at cold temperatures, very high peak in-rush current may be required to initially drive the coil, such as current demands in the range of approximately 90 A to 100 A. Typically, a high-side power FET is used as a switch to allow this much current to flow, and in order to meet the high demands.
High current flow can cause stress, damage, and fault violations to power driving circuitry, including one or more FETs. Thus, certain prior art approaches have evolved in an effort to allow the FET to source sufficient current for the application (e.g., 90 A to 100 A as described above), while at the same time limiting current flow so as not to unduly exceed the needed current, in order to protect the device against potential damage. In a prior art approach, therefore, current through the FET is monitored, and, if the current exceeds a threshold, a protection function is taken that disables the transistor gate potential, thereby disabling the transistor and ending the flow of excessive current. In this approach, therefore, the monitoring circuit must allow the FET to provide sufficient current without triggering the protective action. However, due to certain factors, such as process variations and mismatch of devices, the current threshold needs to be set or “trimmed” to achieve that threshold with acceptable accuracy. Further, trimming a current limit to 90 A or higher in automatic test equipment (ATE) for production is very demanding in terms of hardware and reliability of the part.
Given the preceding, while the prior art approaches may be acceptable in certain implementations, some applications may have requirements that are not satisfactorily met with these prior art approaches. Hence, an accurate apparatus and method for testing, trimming, and implementing a FET and controller with a very high-value current-limit, yet using low current calibration, is very valuable for test and production and is needed. The present inventors, therefore, endeavor to provide such apparatus and method, as further detailed below.